R&d Engineer I

hace 2 días

Santiago de Chile Synopsys A tiempo completo

44311BR
- CHILE - Santiago

**Job Description and Requirements**

Synopsys' transistor-level verification product ESP is looking for an R&D Engineer to join our team in Santiago, Chile

In this role, you will be part of a creative and passionate team, contributing to develop a tool utilized by customers that sit in the cutting edge of IC design. ESP is a formal verification tool used by IC designers to catch differences in SPICE and Verilog netlists. This position requires understanding of digital circuits and written Verilog and/or SPICE netlists, as well as basic knowledge of C/C++ programming and software development.

As an ESP engineer you will need to have good debug and problem-solving skills, be able to work both independently and as part of a team, and have a strong desire to learn and explore new technologies. Your responsibilities will include developing solutions to challenging verification problems, develop product enhancements, and fix software defects, effectively providing a tool that our customers can rely on. You will be part of a global team, and good written and oral communication skills are required to be able to deliver solutions and features in a timely manner.

Understanding of formal verification strategies and strong software development experience with C/C++ are added advantages.

**Skills Required**:

- Bachelor, in Computer Science / Electronics or equivalent
- CMOS digital design
- basic C/C++, Verilog/System Verilog/SPICE netlist format
- Good communication skills in English (spoken and written)

**Desired**: Advanced C/C++, TCL

**Please submit your resumé in English.**

The EDA Group is focused on solving the semiconductor design industry’s high-value problems, including the march to angstroms, multi-die system integration, rapid node migration, right-first-time silicon, and reliability. Our full EDA software stack, spanning system architecture, design capture, verification, implementation, signoff, silicon lifecycle management (SLM), TCAD, and silicon manufacturing, enables our customers to rapidly bring high-performance chip designs to market. Our EDA stack is further augmented with hyperconvergence, AI engines, and data analytics that enable our customers to target their toughest productivity bottlenecks at every stage of chip design.
- Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability._
- #LI-DG_

**Job Category**
- Engineering

**Country**
- Chile

**Job Subcategory**
- R&D Engineering

**Hire Type**
- Employee

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